MIPI CSI-2 / DSI FPGA IP ターゲットデバイス Xilinx社 Spartan-6、7 Series（Zynq含む） DSI Transmitter IP 本IPは入力された画像信号をSerializeし、MIPI DSIのPacketデータとして出力します。 MIPI D-PHY Bridge IC （Meticom社 MC20902等）を置いて、High-Speed信号とLow-Power信号を合成して
Welcome to the Silicon Line Media Room! A bout Silicon Line GmbH. Silicon Line is the global leader in ultra-low-power optical link technology enabling thin, lightweight and long high-speed cables for consumer electronics, commercial and industrial applications. MIPI DSI Peripheral Controller IP Core - HIP3510 ... MIPI CSI-2 Transmitter IP core - HIP 3900 ... Serializer/Deserializer supporting RapidIO 2.1 communication protocol. MIPI® DSI Bridge to eDP Features Single-Port MIPI® DSI Receiver Input port configurable between port 1 and 2 Compliant with D-PHY1.1 and DSI1.02 1 clock lane and 1~4 configurable data lanes 80Mb/s~1.5Gb/s per data lane Data lane and polarity swapping Internal Rterm calibration w/i less than 5% error
The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, recently announced that development has been completed on MIPI A-PHY v1.0, a long-reach serializer-deserializer (SerDes) physical layer interface for automotive applications. Interface ICs are available at Mouser Electronics from industry leading manufacturers. Mouser is an authorized distributor for many interface IC manufacturers including Atmel, Cypress, Intersil, Maxim, NXP, Silicon Labs, Texas Instruments & many more . DRAFT MIPI Alliance Specification for DSI. 1 notice of disclaimer. 2 The material contained DRAFT MIPI Alliance Specification for DSI. 121 8.8.18 DO NOT USE and Reserved Data Types...